Tuesday, January 17, 2006

Itanic according to Doug Rady...

I guess not too many of you know Doug Rady, but he's one of those guys who can understand very technical stuff, write so that it can be understood by others than Einstein, yet remains open to new ideas and knowledge.

He has worked in several companies, but especially in Oracle Development, and he knows people and reasons for things heading the way they are.

He's also a member of the OakTable. His mailid is drady@willcode.com ...

Here are his thoughts about Itanium (which I call Itanic) and I thought the clarity of the whole argument deserved to be known outside a small group of friends:
------------------------------
Regarding Itanium ... unless you NEED the ability to put 2TB, 4TB or more of RAM on a single system managed by a single O/S ... AND/OR ... you need to have more than 64 or 128 processors on a single system all running within a single O/S ... DO NOT BOTHER with Itanium.

Itanium cannot compete with Opterons (or most Xeons) for
integer compute operations as Jeff described. For the most
part, Oracle lives in the generic integer and branch prediction units of a processor. Currently, this (along with the HyperTransort memory i/f) means the Opterons will give you the best Oracle performance at the processor level.

Itanium does not compete well on integer.

If you need LOTS of memory and can wait a bit, the Opteron boards are finally getting to the point having enough DIMM slots. Still, back in 1995/1996/1997, Intel was telling Itanium "partners" that they should plan for 16GB or RAM per CPU.
Most are just getting to that level today with dual-cores Itaniums coming soon.

Unfortunately, the memory i/f hasn't changed, so that will become even more of a choke point. [for some reason, a lot of cpu/system folks don't scale up the memory i/f when they scale up the cpu speeds/counts. and then wonder why customers complain when the "new" stuff goes slower!]

For further amusement, go back and look at the history of how Intel has positioned Itanium. It has gone from being the end all be all replacement for x86, to being a server-only chip, to being an enterprise-server chip, to being a database server
chip, to being a high-end HPC server chip that can also do DB.

There aren't many niches left for them to corner Itanium into. Then consider the string of delays that have been part of the Itanium life-span so far. Merced was late and still-born. McKinley too was late and has not kept up. Montecito has been
re-vamped & delayed. The follow-ons have been pushed out.

While Itanium is not (yet?) a 432 ... it doesn't seem to have any hope of being a 860 or 960. How long will Intel keep sinking ca$h into Itanium with so little ROI?

drady
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8 Comments:

Blogger Noons said...

Incredibly good insight, IMHO.

64-bit architecture is nothing new: back in the 70s, both Univac and Control Data dabbled in it. I still have some of the internal papers from Univac where their systems R&D analysed the possible shortcomings of the technology.

Number one problem? The lack of a matching hardware memory architecture! Not just at the bus level but also at the virtual memory address translation.


We are still building servers nowadays for 64bit chips with the same bus-memory architecture that was used for 32-bit. The problem of course is that it takes TIME to shuffle around all those bits between the CPU and memory. It just can't be done one bit at a time.

The trick in the 32-bit architecture days was to use large "pipes": parallel 8-bit, 16-bit and 32-bit (words) pipes to move all that data around.


By there are diminishing returns in this: once you start dealing with "word at a time" addressing, it becomes progressively less efficient to deal with SMALLER amounts of data.


While with 32-bits this is not that obvious, with 64-bits and larger it is: why would you shuffle (and process) 64-bit words to/from memory if all you want is to add two 16-bit integers?


And so on. This also has implications with virtual memory addressing and virtual to real translation layers - TLA tables, TLBs, etc. Same problem. Same design restrictions.


Ever tried to run a memory speed test program in modern PC architectures? It is surprising how much difference the alignment of requested data into 32, 64, 128 and larger bit boundaries can make: sometimes as much as double the speed of processing!


Let's not even get started in the problems involved in CPU L1 and L2 caching: the whole thing gets more complex by orders of magnitude.

While it is true that 64-bit CPUs are THEORETICALLY faster than 32-bit ones, a computer is not just the CPU! There is a LOT MORE to them than that.

And that's been the problem with Intel and to a certain extent AMD: they totally forgot in the frenzy of "Moore's law" that the CPU is only one small part of the whole equation.


Until the rest of the chain is involved, it won't matter how many bits you throw into a CPU word size: it won't run appreciably faster until all parts of the transport system are also super-highways...

8:47 PM  
Anonymous John Hurley said...

What nuno noted in his comment points directly to the advantages of proven 64 bit architecture's like sun and hp's (old) pa-risc, etc. It's not the cpu but the cpu and bus interface combination that deliver a tangible benefit.

5:48 PM  
Anonymous marco bello said...

itamium is out... everybody knows it.

intel won't afford keeping spending and supporting technology that doesn't deliver as much as it did, or it does for that matter.

netburst didn't deliver, neither did itanic(sc), but pentium m has potential, shall they actually consider pushing it towards the server market, giving it 64bit and the like... it would be interesting to see how it performs and if they manage to keep the power consumption low.

meanwhile, amd delivers, plain and simple. even dell sells amd(not systems, but processors). I bet the dell machines with amd inside(sc) aren't that far away either. because the business demands it, not because they want to.

(please leave the emails... they are a spam trap for a software I am writing. thanks)

ibm_test@equinoxe.de
ibm_test@equinoxe.biz
ibm_test@equinoxe.com

8:02 AM  
Anonymous marco bello said...

Allies pledge $10 billion to boost Itanium

looks like it ain't out after all...

11:30 PM  
Blogger drady said...

"I'm not dead yet!"

Continuing the denial ... Itanic moves to 90nm process:
http://arstechnica.com/news.ars/post/20060128-6071.html

9:25 AM  
Blogger Noons said...

Interesting, Marco's news about the pledge...
I wonder how Apple is going to fit into all this: they just gave up on a 64-bit fast IBM architecture to go Intel all the way. Will they be using the Itanium or something else?

4:47 AM  
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